Verilog and its types

             (Note: Click Label To Check various Topics like Diodes,Rectifier,etc.)

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What is Verilog HDL?

• Its a Hard Description language (HDL)
• its a high level language to describe the circuit by syntax and sentences
• its is similar other computer software languages like C++, 
• Verilog is hardware language like circuits with transistor or switch  level, gate level.

Who developed Verilog?

Verilog is developed by gateway design automation for logic simulation in 1984

 

Verilog HDL:

Its allow you to simulate earlier in design cycle of circuit you design in order to correct errors or experiment in different architectures

HDL is usually more readable to design when large circuit is designed 

Its has 4 level of abstraction (abstractions means  simplified version of something technical )

• Behavior level or Algorithmic level 
• Data flow level 
• Gate level 
• Switch level

Why there are four abstraction?

Four abstraction is because we can write four different method to write a single verilog circuit code . 

 

What is Behavior level or Algorithmic level ?

this types code level contain loops statement : if else , case, etc

Code: 

module example (input a,b, output c);

always @ (a or b)

if (b)

c= a;

endmodule

As you can see above CODE  its has a 

" if  (its a loop statement) " its a behavior Level code

What is Data flow level ?

by name itself you can notice that coding or coding logic based how data or bits flow from input to output.

Code: 

module example (input a, b , output c);

assign c =  a & b;          (Note: "&" indicate AND GATE)

endmodule      

Explanation:

AND GATE

the path of above gate is from input to output is (A+B ) to (C)

 so i coded as                    assign c = a&b; 

" &"  is AND gate operator (addition)

What is Gate level ?

by name itself you can notice that coding logic based on gate 

like : AND, OR,etc.

AND GATE

Code: 

module example (input a,b, output c);

and (c,a,b);                    ( Note : and - gate, (output,input1, input2)

endmodule

Switch level:

Coding logic based on switch level i.e transistor level

FIG 1

                              

         

           

FIG 2

              

In fig 1 you can see there are two transistor ones is pmos, nmos.

pmos has bubble in gate and nmos has no bubble

Code: 

module example(vin , vout);

input(vin);

output(vout);

supply1 v;                   //power supply 1 voltage

supply0 g:                   //power supply 0 voltage to ground

pmos(out,v,in);         //pmos(drain,source,gate)

nmos(out,g,in);        //nmos(drain,source,gate)

endmodule

Click Label To Check various Topics like Diodes,Rectifier,etc.

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